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  19-6405; rev 0; 3/13 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maximintegrated.com/MAX77178.related. typical operating circuit wimax is a registered certification mark and service mark of wimax forum. wi-fi is a registered certification mark of wi-fi alliance corporation. general description the max7 7178/max77179 step-down converters are optimized for powering the power amplifier (pa) in mul - timode/multiband handsets for 3g/4g applications such as lte, wcdma, as well as other rf pa applications such as wi-fim and wimaxm. the 2.5v to 5.5v input supply range supports both current and future battery chemistries. the max77179 uses an analog input driven by an external dac to control the output voltage linearly for continuous pa power adjustment. the output voltage range (0.5v to v in ) supports operation with a wide variety of pas. the MAX77178 uses a 2-bit gpio interface with four selectable output voltage options to control the output voltage supply for pa power adjustment. fast switching frequency (8mhz, typ) allows the use of low value inductor and small ceramic output capaci - tors while maintaining low-ripple voltage. efficiency is enhanced at light loads by switching to skip mode where the converter switches only as needed to service the load. adaptive smart fet scaling further improves efficiency under all operating conditions. other features include overcurrent and overtemperature protection, and a very low-current (0.1a, typ) shutdown mode. features s meet 3g/4g timing and rf spectrum mask requirements ? 20s (typ) settling time for 0.5v to 3.4v output voltage change ? 30s (typ) settling from enable to 95% output voltage regulation s four selectable output voltages with logic inputs (MAX77178 only) s analog controlled output voltage settings from 0.5v to v in (max77179 only) s 1a peak output current capability s 3% output voltage accuracy s allows use of small (1210) 0.47h inductor s 100% duty-cycle operation s simple logic on/off controls s < 1a shutdown supply current s 2.5v to 5.5v supply voltage range s overcurrent and overtemperature protection applications lte, wcdma cell phones/ smartphones /tablets/ data cards sel0 (mode_sel) in3 note: ( ) for max77179 v in v in v out c4 1f sel1 (byp) en MAX77178 max77179 (ref) c2 4.7f c5 0.1f in1 c1 0.1f c3 4.7f 0.47h in2 lx pgnd fb agnd gsns MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maximintegrated.com.
2 in1, in2 to pgnd ................................................. -0.3v to +6.0v in3 to agnd ........................................................ -0.3v to +6.0v sel0, sel1, en, fb to agnd (max77179) -0.3v to (v in3 + 0.3) mode_sel, byp, ref, en, fb to agnd (MAX77178) ................................ -0.3v to (v in3 + 0.3) ref to gsns .............................................. -0.3v to (v in3 + 0.3) agnd to gsns .................................................... -0.3v to +0.3v agnd to pgnd .................................................... -0.3v to +0.3v i lx current ............................................................... 1250ma rms continuous power dissipation (t a = +70nc) 12-bump, 1.75mm x 1.4mm wlp (derate 13.7 mw/c above +70c) ........................... 1096mw operating temperature range .......................... -40c to +85c junction temperature ..................................................... +150c storage temperature range ............................ -65c to +150c soldering temperature (reflow) ...................................... +260c wlp junction-to-ambient thermal resistance ( q ja ) .......... 73c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. note 2: this device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board-level solder attach and rework. this limit permits only the use of the solder profiles recommended in the industry-standard specification, jedec 020a, paragraph 7.6, table 3 for ir /vpr and convection reflow. preheating is required. hand or wave soldering is not allowed. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v in1 = v in2 = v in3 = 3.7v, v pgnd = v agnd = 0v, l = 0.47h, c out = 4.7f, t a = -40c to +85c. typical values are at t a = +25c, unless otherwise noted.) (note 3) parameter conditions min typ max units general in1, in2, in3 operating voltage 2.5 5.5 v in1, in2, in3 undervoltage lockout (uvlo) threshold in1, in2, in3 falling (enter power-down mode and disable the output) 2.10 2.20 2.30 v in1, in2, in3 uvlo hysteresis 100 mv in1, in2, in3 shutdown supply current v en = v agnd = 0v or v in_ is below uvlo threshold t a = +25nc 0.1 1 fa t a = +85nc 0.1 step-down dc-dc converter in1, in2, in3 no-load supply current v out = 0.5v, no load, skip mode operation 450 fa v out = 0.5v, no load, pwm operation 3.5 ma v out = 3v, no load, pwm operation 8 output capacitance required for stability v out = 0.5v to v in1 , i out = 0a to 1a 0.1 0.47 10 ff output inductance required for stability v out = 0.5v to v in1 , i out = 0a to 1a 0.22 1.0 fh startup time from shutdown from v en = low to v en = high, v out = 0.5v 30 fs maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
3 electrical characteristics (continued) (v in1 = v in2 = v in3 = 3.7v, v pgnd = v agnd = 0v, l = 0.47h, c out = 4.7f, t a = -40c to +85c. typical values are at t a = +25c, unless otherwise noted.) (note 3) parameter conditions min typ max units output transition time (max77179) rise time when v out transitions from 0.5v to 3.4v, i out = 1a, c out = 4.7ff, l = 0.47fh 0.33 v/fs output transition time (MAX77178) rise time when v out transitions from 0.8v to 3.4v, i out = 500ma, c out = 4.7ff, l = 0.47fh 0.33 v/fs maximum output current 1 a high-side current-limit threshold 1.2 2.0 a low-side current-limit threshold 0.8 1.65 a low-side negative current-limit threshold 0.7 1.8 a low-side zero-cross threshold 40 ma lx high-side on-resistance in1/in2 to lx, i lx = -200ma v out > 1.6v, v mode_sel = v in3 90 160 mi 1v p v out p 1.6v, v mode_sel = v in3 135 v out < 1v, v mode_sel = v in3 192 v out > 1.8v, v mode_sel = v agnd 135 v out p 1.8v, v mode_sel = v agnd 360 lx low-side on-resistance lx to pgnd, i lx = -200ma v out > 1.6v, v mode_sel = v in3 75 130 mi 1v p v out p 1.6v, v mode_sel = v in3 110 v out < 1v, v mode_sel = v in3 150 v out > 1.8v, v mode_sel = v agnd 110 v out p 1.8v, v mode_sel = v agnd 290 lx leakage current v in_ = v lx = 5.5v, v en = 0v t a = +25nc -2.0 0.03 +2.0 fa t a = +85nc 0.24 efficiency v in1 = 3.6v, v out = 0.7v, i out = 16ma 68 % v in1 = 3.6v, v out = 1.3v, i out = 50ma 80 v in1 = 3.6v, v out = 2.2v, i out = 300ma 89 v in1 = 3.6v, v out = 3.0v, i out = 500ma 93 maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
4 electrical characteristics (continued) (v in1 = v in2 = v in3 = 3.7v, v pgnd = v agnd = 0v, l = 0.47h, c out = 4.7f, t a = -40c to +85c. typical values are at t a = +25c, unless otherwise noted.) (note 3) parameter conditions min typ max units lx rise time 1 ns output-voltage line regulation v in = 2.5v to 5.5v, i out = 100ma, v out = 1.8v 1.3 %/v line regulation transient response v in1 (dc) = 3.6v rms , v in1 (ac) = 300mv p-p ripple at 10hz to 270khz, i out = 500ma, v out = 3.0v 25 mv p-p output-voltage load regulation i out = 0 to 1a -1.5 %/a load regulation transient response t rise = t fall = 1.5fs, i out = 0.2a to 1a, v out = 3.0v 25 mv p-p operating frequency v out = 1.8v, i out = 0a, pwm 6 8 10 mhz automatic bypass mode entry threshold v in - v out , when the drop between v in and v out becomes less than this threshold, high-side fet is turned on continuously 0.125 v automatic bypass mode entry hysteresis 40 mv automatic bypass mode exit debounce time 5 fs minimum duty cycle skip mode 0 % pwm mode 10 maximum duty cycle 100 % output-voltage ripple c out = 4.7f f, esr of c out < 20mi , f sw = 8mhz, i out = 10ma to 1a, v out = 1.8v, pwm mode 5 mv p-p skip mode, i out = 0ma 45 protection circuits thermal shutdown 160 nc thermal shutdown hysteresis 20 nc control ref input voltage range max77179, analog control voltage 0 v in3 - 0.3 v ref to out gain accuracy max77179, v ref = 1v, gain = v out /v ref -2.5 +2.5 % ref to out absolute accuracy (max77179) v ref = 1v, i out = 0 t a = +25nc -3 +3 % t a = -40nc to +85nc -3.5 +3.5 output voltage range (max77179) controlled by the ref input 0.5 v in v v ref = 0v, skip mode operation 0.1 maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
5 electrical characteristics (continued) (v in1 = v in2 = v in3 = 3.7v, v pgnd = v agnd = 0v, l = 0.47h, c out = 4.7f, t a = -40c to +85c. typical values are at t a = +25c, unless otherwise noted.) (note 3) note 3: all devices are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design. note 4: factory programmable parameter. contact the factory for options. parameter conditions min typ max units output voltage accuracy (MAX77178) v sel1 = 0, v sel0 = 0, v out = 2.9v t a = +25nc -2 +2 % t a = -40nc to +85nc q3 v sel1 = 0, v sel0 = 1, v out = 2.325v t a = +25nc -2 +2 t a = -40nc to +85nc q3 v sel1 = 1, v sel0 = 1, v out = 1.7v t a = +25nc -2 +2 t a = -40nc to +85nc q3 v sel1 = 1, v sel0 = 0, v out = 1.0v t a = +25nc -2.5 +2.5 t a = -40nc to +85nc q3 ref input current max77179, v ref = 1v t a = +25nc 0.1 1 fa t a = +85nc 1 ref input capacitance max77179 5 pf analog gain setting range max77179 (note 4) 2.5 v/v logic-input high voltage v in_ = 2.5v to 5.5v, v sel_ ,v byp , v mode_sel , v en 1.2 v logic-input low voltage v in_ = 2.5v to 5.5v, v sel_ , v byp , v mode_sel , v en 0.4 v logic-input pulldown resistor sel0, sel1, mode_sel, byp 800 ki select debounce delay t en_debounce , sel0 or sel1(MAX77178), byp or mode_sel (max77179) 500 ns output noise not production tested, 650mhz to 2.2ghz, 30khz resolution bandwidth v in = 3.6v, v out = 3v; i out = 200ma, 400ma, 600ma -105 dbm/ hz maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
6 typical operating characteristics (typical operating circuits, v in = 3.7v, i out = 0.47 h, c out = 4.7 f, t a = +25c, unless otherwise noted.) max77179 efficiency vs. load current MAX77178 toc01 load current (ma) efficiency (%) 100 10 20 30 40 50 60 70 80 10 1 1000 v in = 4.2v/3.7v/3.2v v out = 0.6v max77179 efficiency vs. load current MAX77178 toc02 load current (ma) efficiency (%) 100 10 20 30 40 50 60 70 100 80 90 10 1 1000 v in = 4.2v/3.7v/3.2v v out = 1.8v max77179 efficiency vs. load current MAX77178 toc03 load current (ma) efficiency (%) 100 10 1000 v in = 4.2v/3.7v/3.2v v out = 2.5v 20 30 40 50 60 70 100 80 90 10 max77179 efficiency vs. load current MAX77178 toc04 load current (ma) efficiency (%) 100 10 1000 v in = 4.2v/3.7v/3.2v v out = 3.2v 20 30 40 50 60 70 100 80 90 10 MAX77178 efficiency vs. load current MAX77178 toc04a load current (ma) efficiency (%) 10 100 10 1000 20 30 40 50 60 70 100 80 90 10 v in = 4.2v/3.7v/3.2v v out = 1.0v MAX77178 efficiency vs. load current MAX77178 toc04b load current (ma) efficiency (%) 10 100 10 1000 20 30 40 50 60 70 100 80 90 10 v in = 4.2v/3.7v/3.2v v out = 1.7v MAX77178 efficiency vs. load current MAX77178 toc04c load current (ma) efficiency (%) 10 100 10 1000 20 30 40 50 60 70 100 80 90 10 v in = 4.2v/3.7v/3.2v v out = 2.325v MAX77178 efficiency vs. load current MAX77178 toc04d load current (ma) efficiency (%) 10 100 10 1000 20 30 40 50 60 70 100 80 90 10 v in = 4.2v/3.7v/3.2v v out = 2.9v maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
7 typical operating characteristics (continued) (typical operating circuits, v in = 3.7v, i out = 0.47 h, c out = 4.7 f, t a = +25c, unless otherwise noted.) efficiency vs. output voltage MAX77178 toc05 output voltage (v) efficiency (%) 3.4 3.0 2.6 2.2 1.8 1.4 1.0 0.6 50 60 70 80 90 100 40 0.2 3.8 v in = 3.7v r out = 5i mode_sel = gnd mode_sel = high efficiency vs. output voltage MAX77178 toc06 output voltage (v) efficiency (%) 3.4 3.0 2.6 2.2 1.8 1.4 1.0 0.6 50 60 70 80 90 100 40 0.2 3.8 v in = 3.7v r out = 10i mode_sel = gnd mode_sel = high efficiency vs. output voltage MAX77178 toc07 output voltage (v) efficiency (%) 3.4 3.0 2.6 2.2 1.8 1.4 1.0 0.6 50 60 70 80 90 100 40 0.2 3.8 v in = 3.7v r out = 20i mode_sel = gnd mode_sel = high frequency vs. reference voltage MAX77178 toc08 reference voltage (v) frequency (mhz) 1.2 0.9 0.6 0.3 1 2 3 4 5 6 7 8 9 10 0 0 1.5 v in = 3.7v, r out = 5i frequency vs. reference voltage MAX77178 toc09 reference voltage (v) frequency (mhz) 1.2 0.9 0.6 0.3 1 2 3 4 5 6 7 8 9 10 0 0 1.5 v in = 3.7v, r out = 10i frequency vs. reference voltage MAX77178 toc10 reference voltage (v) frequency (mhz) 1.2 0.9 0.6 0.3 1 2 3 4 5 6 7 8 9 10 0 0 1.5 v in = 3.7v, r out = 20i no load supply current vs. supply voltage MAX77178 toc11 supply voltage (v) no load supply current (ma) 5.0 4.5 4.0 3.5 3.0 2 4 6 8 10 12 0 2.5 5.5 v in = 3.7v v out = 2.5v v out = 1.8v v out = 3.2v v out = 0.6v load regulation error vs. load current MAX77178 toc12 load current (ma) load regulation error (mv) 800 600 400 200 -60 -40 -20 0 20 40 -80 0 1000 error = v out - 2.5 x v ref v ref = 0.32v/0.48v/0.72v v ref = 0.16v v ref = 0.96v v ref = 1.12v v ref = 1.28v maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
8 typical operating characteristics (continued) (typical operating circuits, v in = 3.7v, i out = 0.47 h, c out = 4.7 f, t a = +25c, unless otherwise noted.) enable waveform (no load) MAX77178 toc18 5v/div 2v/div 2v/div 1a /div 0a 0v 0v 0v i lx v lx v out v en 10s/div v ref = 1.28v heavy load switching waveform MAX77178 toc17b 10mv/div 2v/div 500ma /div 0a 0v i lx v lx v out ac-coupled 200ns/div v out = 3.2v 500ma load light load switching waveform MAX77178 toc16 20mv/div 2v/div 100ma /div 0a 0v i lx v lx v out ac-coupled 2s/div 20ma load heavy load switching waveform MAX77178 toc17a 10mv/div 2v/div 500ma /div 0a 0v i lx v lx v out ac-coupled 200ns/div v out = 2.5v 500ma load line regulation error vs. supply voltage MAX77178 toc13 supply voltage (v) line regulation error (mv) error = v out - 2.5 x v ref v ref = 0.72v v ref = 0.16v v ref = 0.96v v ref = 1.12v v ref = 1.28v 5.14.74.33.93.53.1 -50 0 50 100 -100 2.7 5.5 v ref = 0.32v v ref = 0.48v output voltage error vs. ref voltage MAX77178 toc14 ref voltage (v) output voltage error (mv) v in = 3.7v error = v out - 2.5 x v ref 1.31.10.90.70.50.3 -100 -50 0 50 -150 0.1 1.5 output voltage error vs. temperature MAX77178 toc15 temperature (c) output voltage error (mv) 60 35 10 -15 -60 -40 -20 0 20 -80 -40 85 error = v out - 2.5 x v ref v in = 3.7v v ref = 0.72v v ref = 0.16v v ref = 1.28v maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
9 typical operating characteristics (continued) (typical operating circuits, v in = 3.7v, i out = 0.47 h, c out = 4.7 f, t a = +25c, unless otherwise noted.) load transient response MAX77178 toc23a 20mv/div v out ac-coupled i out 10s/div v ref = 0.72v 10ma 10ma 500ma enable waveform (5i load) MAX77178 toc19 5v/div 2v/div 2v/div 1a /div 0a 0v 0v 0v i lx v lx v out v en 10s/div v ref = 1.28v ref transient response (0.28v to 1.36v) MAX77178 toc20 2v/div 2v/div 1a /div 0a 0v 0v i lx v lx v out v ref 4s/div r out = 5i 0.28v 1.36v refin transient response (1.36v to 0.28v) MAX77178 toc21 2v/div 2v/div 1a /div 0v 0a 0v i lx v lx v out v ref 4s/div no load 0.28v 1.36v MAX77178 toc22 50mv/div v out ac-coupled v in 20s/div v ref = 0.72v r out = 5i 3.2v 4.2v 4.2v line transient response load transient response MAX77178 toc23b 20mv/div v out ac-coupled i out 10s/div v ref = 1.28v 10ma 10ma 500ma maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
10 pin description pin configuration pin name function MAX77178 max77179 a1 agnd ground connection a1 ref dac-controlled analog input. it is used to set the pa voltage. connect ref to a dac for pa power control. a2 a2 en enable input. connect en to in_ or logic-high for normal operation. connect en to agnd or logic-low for shutdown mode. a3 a3 agnd low-noise analog ground. connect agnd to the in3 decoupling capacitor and then to pgnd. a4 a4 in3 analog supply voltage input. connect in3 to a battery or supply voltage from 2.5v to 5.5v. bypass in3 to agnd with a 1 ff ceramic capacitor as close as possible to the devices. connect in3 to the same source as in1/in2. b1 sel0 output-voltage selection input 0. connect sel0 and sel1 to logic-high or logic-low to set the step-down converter output voltage to one of four voltage levels. see table 1. sel0 is internally connected to agnd through an 800k i pulldown resistor. b1 mode_sel mode selection input. mode_sel adjusts the fet scaling threshold. mode_sel is internally connected to agnd through an 800k i pulldown resistor. b2 b2 gsns ground sense node. connect gsns to the same ground as the dac used to control ref. alternatively, gsns can be connected directly to agnd. b3 b3 fb output-voltage feedback input. connect fb directly to the load, ensuring that no current is running in fb trace. b4 b4 lx inductor connection. connect an inductor from lx to the output of the dc-dc converter. lx is high impedance during shutdown. wlp top view (bumps on bottom) in1 sel1 lx sel0 in3 agnd MAX77178 + 1 2 34 a pgnd in2 gsns fb en agnd b c wlp in1 byp lx mode_sel in3 ref max77179 + 1 2 34 a pgnd in2 gsns fb en agnd b c maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
11 pin description (continued) detailed description the MAX77178/max7717 9 step-down converters are optimized for dynamically powering the pa in multiband 3g/4g mobile communications. they provide a single- device pa power-management solution that supports basic power control for wcdma and lte applications. the devices are high-bandwidth converters designed to meet the load-transient response requirements for large- signal polar transmitter architectures. the MAX77178 provides two logic control inputs (sel0 and sel1) to program the dc-dc converter output volt - age to one of four options (1.0v, 1.7v, 2.325v, or 2.9v). this method simplifies system implementation by mini - mizing changes to the existing baseband software. for other output voltage options, contact factory. the max77179 provides an independent dac-controlled analog input (ref) to support power control applications for wcdma/lte. two other logic control inputs (byp and mode_sel) select the dac-controlled input source and the ics operational modes for multimode applications. the output voltage range (0.5v to v in ) supports opera - tion with a wide variety of pas, and allows implementation of aggressive power-management schemes. the 2.5v to 5.5v input supply range supports both current and future battery chemistries. fast switching frequency allows the use of small ceramic input and output capacitors while maintaining low-ripple voltage. efficiency is enhanced at light loads by switching to skip mode where the converter switches only as needed to service the load when the skip mode is enabled. adaptive smart fet scaling further improves efficiency under all operating conditions. shutdown mode connect en to agnd or logic-low to place the ics in shutdown mode. in shutdown, the control circuitry, inter - nal switching mosfet and synchronous rectifier turn off and lx becomes high impedance. connect en to in_, or logic-high for normal operation. skip mode the step-down converters feature skip mode to provide the highest possible efficiency during light load condi - tions. skip mode is only activated when the output volt - age is within 12% of the desired regulated value. this requirement maintains the proper slew-rate operation of the output voltage, particularly when the ref input is slewing down. skip mode occurs when a zero-cross condition is detected on the inductor current. pin name function MAX77178 max77179 c1 sel1 output-voltage selection input 1. connect sel0 and sel1 to logic-high or logic-low to set the step-down converter output voltage to one of four voltage levels. see table 1. sel1 is internally connected to agnd through an 800k i pulldown resistor. c1 byp bypass mode selection input. when byp = gnd, the ic is set for automatic bypass mode operation. when byp = in, the control circuitry forces the ic into bypass mode where the high-side fet is turned on continuously with all fet scaling segments enabled, regardless of the mode of operation. byp is internally connected to agnd through an 800k i pulldown resistor. c2 c2 pgnd power ground. connect pgnd and the input/output capacitor grounds through a star connection to the pcb ground plane. c3, c4 c3, c4 in2, in1 power-supply voltage input. connect in1/in2 to a battery or supply voltage from 2.5v to 5.5v. in1/in2 powers the internal p-channel and n-channel mosfets. bypass in1/in2 to pgnd with a 4.7 ff ceramic capacitor as close as possible to the devices. connect in1/in2 to the same source as in3. maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
12 table 1. MAX77178 output voltage selection table 2. max77179 mode selection fet scaling operation the ics include a fet scaling feature to improve effi - ciency over a wide range of operating conditions. the size of the power fet is adjusted based on the output- voltage setting of the dc-dc converter to provide opti - mal efficiency for different output power conditions. since the ics can drive multiple pas, the load resistance and output power operating points can be different. for this reason, the mode_sel pin allows selection between two different fet scaling transition points. output voltage control the MAX77178 has two digital inputs (sel0 and sel1) to set the output voltage to one of four options (1.0v, 1.7v, 2.325v, or 2.9v). see table 1 for programmable output voltage settings. contact factory for alternate output volt - age settings. the max77179 uses an analog input (ref) driven by an external dac to control the output voltage linearly for continuous pa power adjustment. see table 2 for details. thermal-overload protection thermal-overload protection limits total power dissipa - tion in the device. if the junction temperature exceeds +160c, the step-down converters turn off, allowing the ics to cool. the step-down converters turn on and begin soft-start after the junction temperature cools by 20c. this results in a pulsed output during continuous thermal- overload conditions. applications information inductor selection the ics operate with a switching frequency of 8mhz and uses a 0.47h inductor. this operating frequency allows the use of physically small inductors while maintaining high efficiency. see table 3 for the recommended induc - tors. the inductors saturation current rating must meet or exceed the lx current limit. for optimum transient response and highest efficiency, use inductors with a low dc resistance. capacitor selection the input capacitor in a dc-dc converter reduces cur - rent peaks drawn from the input power sources and reduces switching noise in the controller. the impedance of the input capacitor at the switching frequency needs to be less than that of the input source so high-frequency switching currents do not pass through the input source. the dc-dc converter output filter capacitors keep output ripple small and ensure control-loop stability. the output capacitor must also have low impedance at the switch- ing frequency. ceramic capacitors are suitable, with ceramic exhibiting the lowest esr and high-frequency impedance. ceramic capacitors with x5r, x7r, or better dielectric are recommended for stable operation over the entire operating temperature range. the primary objective in power-tracking applications is to reduce ripple to approximately 1mv using minimum board space. note that to minimize space taken, bypass - ing adjacent to the pa and the power trace between the device and the pa are relied upon to further reduce ripple. see the pcb layout section. note that since a second - ary filter is relied upon to further reduce ripple and since power tracking often operates at high output voltage, reducing the ics operating frequency, high value capac - itors with lower resonant frequency are recommended. table 4 lists the recommended capacitor specification for power tracking. x = dont care. x = dont care. en sel1 sel0 output voltage (v) 0 x x off 1 0 0 2.9 1 0 1 2.325 1 1 0 1.0 1 1 1 1.7 en mode_sel byp mode 0 x x off 1 0 0 on, mode_sel low mode v out = 2.5 o v ref 1 0 1 on, forced bypass mode 1 1 0 on, mode_sel high mode v out = 2.5 o v ref 1 1 1 on, forced bypass mode maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
13 table 3. suggested inductors table 4. recommended capacitor specification for power tracking pcb layout due to fast-switching waveforms and high-current paths, careful pcb layout is required to achieve optimal per - formance. of the current loops present in the ics, the in to pgnd current loop has the highest ac current and di/dts. the in bypass capacitor should be placed as close as possible to the devices. in communication systems, the pa draws rapid pulses of current that can cause a significant transient during transmission. the in line requires a low-frequency bypassing capacitance. to avoid high-frequency interference, high-frequency capacitor must be placed closer to the device than the low-frequency capacitor. at high frequencies, board layout is governed more by electromagnetic interactions, and less by electronic circuit theory. as an example a constant trace width has less reflection. use rounded corners and avoid changes in trace width as much as possible. minimize trace lengths between the ics and the inductor, the input capacitor and the output capacitor; keep these traces short, direct, and wide. the ground connections of c in and c out should be as close together as possible and connected to pgnd. connect agnd and pgnd directly to the ground plane. refer to the ev kit for an example layout. see figure 1. one difficult aspect of reducing output voltage ripple is minimizing ripple components caused by esr and esl of the output capacitor. esl is often the dominant factor in the output voltage ripple at 8mhz. a 1.5nh esl causes a 12mv output ripple step based on the 0.47 fh inductor to be used. good layout practice such as placing the capacitor next to the device, using short and wide traces, and running traces over the uninterrupted ground plane can limit parasitic inductance to limit esl to approxi - mately 0.5nh. note that above the capacitors resonance frequency, the output filters transfer function no longer rolls off with frequency. to reduce this to acceptable levels, it might be necessary to parallel smaller value out - put capacitors to reduce the esl and reach the desired value of output capacitance. it is possible to change the filter topology in an attempt to reduce switching ripple without having to increase the switching frequency or decrease the passband of the output filter. this is done by adding an additional stage to the output filter, called a secondary filter. in power-tracking applications, this can be accomplished by designing the dc-dc converters output trace and choosing the pas bypass to act as a filter. for example a 13mm long, 1mm wide trace over 14mils of fr4 has approximately 5nh of inductance. if the pa has 1.5ff of bypass capacitance under operating conditions, the sec - ondary filter formed has a corner frequency of 1.8mhz. assuming that the pas bypass capacitance has an esl of 0.5nh, up to 20db of output ripple can be removed by this secondary filter. note that the ics are not designed to respond to feed - back with the additional phase shift inserted by the secondary filter. the fb terminal of the device should be connected to the output of the primary output filter. manufacturer part number inductance (h) esr (mi) current rating (a) dimensions (mm) tdk vls201610et-r47n 0.47 54 2.10 2.0 x 1.6 x 0.95 taiyo yuden makk2016tr50m 0.50 38 3.2 2.0 x 1.6 x 1.0 coilcraft xpl 2010-331 0.33 54 2.75 2.0 x 1.6 x 0.95 tdk vls201610et-r33n 0.33 46 2.50 2.0 x 1.6 x 0.95 component part number part description c1 not needed less bypassing than envelope tracking needed c2, c3 taiyo yuden jmk105bbj475mv 4.7ff q20%, 6.3v x5r ceramic capacitor (0402) c4 samsung cl03a105mq3csnh 1ff q10%, 6.3v x5r ceramic capacitor (0201) c5 not needed replaced by bypassing at pa maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
14 figure 1. max77179 recommended pcb layout v out gn d ground v in 1 /v in 2 c1 0.1f c5 0.1f vin3 c3 4.7f c2 4.7f l1 0.47h c4 1f byp ref pgnd1 en in2 agnd in1 gsns fb lx in3 mode _sel maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
15 block diagrams and application circuits reference voltage selection sel0 in3 v in v in v out c4 1f sel1 en pwm logic gain control control logic MAX77178 c2 4.7f c5 0.1f in1 c1 0.1f c3 4.7f 0.47h in2 lx pgnd voltage sense fb gsns agnd filter mode_sel in3 v in v in v out c4 1f byp en pwm logic gain control control logic max77179 ref c2 4.7f c5 0.1f in1 c1 0.1f c3 4.7f 0.47h in2 lx pgnd voltage sense fb gsns agnd maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
16 ordering information package information for the latest package outline information and land patterns (foot - prints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. all devices operate over the -40c to +85c temperature range. +denotes a lead(pb)-free/rohs compliant package. t = tape and reel. these devices have a minimum order increment of 2500 pieces. chip information process: bicmos part pin- package package code MAX77178ewc+t 12 wlp, 0.4mm pitch w121a1+1 max77179ewc+t 12 wlp, 0.4mm pitch w121a1+1 package type package code document no. outline no. 12 wlp, 0.4mm pitch w121a1+1 21-0449 refer to application note 1891 maxim integrated MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 17 ? 2013 maxim integrated maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 3/13 initial release MAX77178/max77179 high-bandwidth lte / wcdma pa power management ics in a 1.75mm x 1.4mm, 0.4mm pitch wlp


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